Wissenschaftlicher Mitarbeiter
Dr.-Ing. Saleh Mulhem
Forschungsgruppenleiter
- saleh.mulhem@uni-luebeck.de
- Telefon
- +49 451 3101 6317
- Büro
- Gebäude 64, Raum 123 (2. OG)
- Anschrift
- Universität zu Lübeck
Institut für technische Informatik
Ratzeburger Allee 160
23562 Lübeck
Germany
Forschungsinteressen
Saleh Mulhem leitet am ITI das Forschungsgebiet Dependable Computing mit den Gruppen Secure Computing und Reliable Computing. Er entwickelt hardwarebasierte Lösungen für vertrauenswürdige Rechner: sichere und funktional sichere Prozessoren, effiziente Kryptographie-Beschleuniger, neue hardwarebasierte Geräteidentitäten und die Verifikation von Funktion und Sicherheit ganzer Rechnerplattformen.
- Verlässliche Rechnerplattformen und Security by Design
- Hardwaresicherheit: Hardware-Trojaner, Seitenkanäle, Hardware-Vertrauensanker
- Vertrauenswürdige KI-Beschleuniger und Post-Quanten-Kryptographie in Hardware
- Zuverlässigkeit in der Elektronik und Design for Testability
Doktorandinnen und Doktoranden
- Christian Ewert: Entwurf von Hardware-Vertrauensankern
- Andrija Neskovic: Seitenkanalanalyse von Rechnersystemen
- Daniel Najork: Rechnen auf verschlüsselten Daten
- Tavia Plattenteich: Abschätzung der Leistungsaufnahme von Rechnersystemen
- Melf Fritsch: Beschleuniger für Post-Quanten-Kryptographie
- Leon Dietrich: Beschleuniger für Post-Quanten-Kryptographie
- Mouadh Ayache: Design for Testability und Hardware Trust (extern)
Abschlussarbeiten
Für Bachelor- und Masterarbeiten und Forschungspraktika gibt es unter anderem diese Themen:
- Entwurf integrierter Schaltungen für stromsparende Rechnersysteme
- Abschätzung der Leistungsaufnahme integrierter Schaltungen auf Netzlistenebene
- Entwurf von KI-Chips für eingebettete Systeme
- Zuverlässigkeit eingebetteter Robotiksysteme bewerten
- Zuverlässigkeit und Sicherheit von In-Memory Computing
- Vertrauenswürdige und verlässliche KI-Beschleuniger
- Erklärbare KI
- Effiziente Post-Quanten-Kryptographie, etwa Dilithium oder Falcon, auch als Hardwarebeschleuniger
- Hardware-Trojaner erkennen
- Sichere Prozessoren entwerfen und umsetzen
- Hardware-Vertrauensanker entwerfen
- Zuverlässigkeitstests integrierter Schaltungen
- Ultraleichtgewichtige Kryptographie in der Praxis
- S-Boxen, die Seitenkanalangriffen widerstehen
Weitere Themen gibt es zu Dependable Computing, vertrauenswürdigen KI-Beschleunigern, Design for Testability, Design for Trust und Hardwaresicherheit. Seit 2021 hat Saleh Mulhem über 30 Bachelor- und Masterarbeiten betreut. Wer Interesse hat, schreibt ihm am besten eine kurze E-Mail.
Weitere Veröffentlichungen
Ältere Veröffentlichungen und Patente stehen in seinem Profil bei Google Scholar.
Forschung
Lehre
Semesterunabhängig
WiSe 2026/27
Frühere Semester (8)
- SoSe 2026
- Kryptographische Technik, Zuverlässigkeit von Rechensystemen
- WiSe 2025/26
- Organic Computing, Technische Zuverlässigkeit
- WiSe 2024/25
- Englischsprachiges Seminar "Trustworthy Electronics" für Masterstudierende, Technische Zuverlässigkeit
- SoSe 2024
- Bachelor-Seminar "Quantum Machine Learning", Kryptographische Technik, Zuverlässigkeit von Rechensystemen
- WiSe 2023/24
- Englischsprachiges Seminar "Trustworthy Electronics" für Masterstudierende
- WiSe 2022/23
- Englischsprachiges Seminar "Trustworthy Electronics" für Masterstudierende
- SoSe 2022
- Rechnerarchitektur, Systemarchitekturen für Multimedia
- WiSe 2020/21
- Technische Zuverlässigkeit
Projekte
Abgeschlossene Projekte
Publikationen
H. K. Lin,
W. Foudhaili,
R. Buchty,
M. Berekovic, and
S. Mulhem
Characterising Physical Memory Access Pattern Impact on RISC-V Softcore Performance: A Microbenchmark Study
International Symposium on Applied Reconfigurable Computing, 82-99, Springer Nature Switzerland, Cham, Switzerland 2026, 2.026
URL, DOI, RIS, BibTex
Characterising Physical Memory Access Pattern Impact on RISC-V Softcore Performance: A Microbenchmark Study
International Symposium on Applied Reconfigurable Computing, 82-99, Springer Nature Switzerland, Cham, Switzerland 2026, 2.026
URL, DOI, RIS, BibTex
A. Gutermann,
L. Groth,
A. Neskovic,
S. Mulhem, and
M. Berekovic
Multi-Partner Project: CeCaS Accelerator Design for Efficient Supercomputing in Automotive Systems
2026 Design, Automation & Test in Europe Conference (DATE), IEEE, Verona, Italy 2026, 2.026
URL, RIS, BibTex
Multi-Partner Project: CeCaS Accelerator Design for Efficient Supercomputing in Automotive Systems
2026 Design, Automation & Test in Europe Conference (DATE), IEEE, Verona, Italy 2026, 2.026
URL, RIS, BibTex
L. Groth,
A. Neskovic,
R. Buchty,
M. Berekovic, and
S. Mulhem
Compatibility Ratio as a Guideline for Hardware/DNN Co-Design of Embedded Accelerators
ACM Transactions on Embedded Computing Systems, ACM, 2026, 2.026
URL, DOI, RIS, BibTex
Compatibility Ratio as a Guideline for Hardware/DNN Co-Design of Embedded Accelerators
ACM Transactions on Embedded Computing Systems, ACM, 2026, 2.026
URL, DOI, RIS, BibTex
A. Nechi,
Z. Narjis,
R. Buchty,
M. Berekovic, and
S. Mulhem
Fast Reinforcement Learning for Robust Beam Codebooks in Future Communication Systems
IEEE Transactions on Communications, IEEE, 2025, 2.025
URL, RIS, BibTex
Fast Reinforcement Learning for Robust Beam Codebooks in Future Communication Systems
IEEE Transactions on Communications, IEEE, 2025, 2.025
URL, RIS, BibTex
A. Neskovic,
A. Kabour,
M. Eltantawi,
M. Berekovic,
R. Meyer, and
S. Mulhem
SCA-WAL: An Open-Source Framework for Power Side Channel Assessment at RTL and Netlist Level
IEEE Embedded Systems Letters, 2025, 2.025
URL, RIS, BibTex
SCA-WAL: An Open-Source Framework for Power Side Channel Assessment at RTL and Netlist Level
IEEE Embedded Systems Letters, 2025, 2.025
URL, RIS, BibTex
S. Mulhem,
E. Schultz,
L. Groth,
M. Berekovic, and
R. Buchty
Optimizing Systolic Array-Based NTT Accelerators
IEEE Embedded Systems Letters, IEEE, 2025, 2.025
URL, DOI, RIS, BibTex
Optimizing Systolic Array-Based NTT Accelerators
IEEE Embedded Systems Letters, IEEE, 2025, 2.025
URL, DOI, RIS, BibTex
A. Mahmoudi,
A. Neskovic,
C. Thermann,
R. Sehm,
C. Hübner,
T. Plattenteich,
R. Meyer,
R. Buchty,
et al.
A Systematic Mapping Study on SystemC/TLM Modeling Capabilities in New Research Domains
ACM Transactions on Design Automation of Electronic Systems, ACM, 2025, 2.025
URL, DOI, RIS, BibTex
A Systematic Mapping Study on SystemC/TLM Modeling Capabilities in New Research Domains
ACM Transactions on Design Automation of Electronic Systems, ACM, 2025, 2.025
URL, DOI, RIS, BibTex
A. Mahmoudi,
C. Horn,
S. Mulhem,
R. Buchty,
M. Berekovic, and
R. Meyer
TinyML Unleashed: Accelerating TensorFlow Lite Micro Kernels with RISC-V Vector Extension
33rd Telecommunications Forum (TELFOR), IEEE, 2025, 2.025
URL, RIS, BibTex
TinyML Unleashed: Accelerating TensorFlow Lite Micro Kernels with RISC-V Vector Extension
33rd Telecommunications Forum (TELFOR), IEEE, 2025, 2.025
URL, RIS, BibTex
P. Grothe,
C. Hübner,
R. Buchty,
M.,
Berekovic, and
S. Mulhem
A Lightweight Peripheral Design for RRAM-based LUTs
IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, London, United Kingdom 2025, 2.025
URL, RIS, BibTex
A Lightweight Peripheral Design for RRAM-based LUTs
IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, London, United Kingdom 2025, 2.025
URL, RIS, BibTex
C. Ewert,
A. Neskovic,
C. Heinz,
F. Muuss,
A. Treff,
M. Gourjon,
R. Buchty,
T. Eisenbarth,
et al.
Lightweight Authenticated Integration and In-Field Secure Operation of System-in-Package
ACM Transactions on Design Automation of Electronic Systems, 2025, 2.025
URL, DOI, RIS, BibTex
Lightweight Authenticated Integration and In-Field Secure Operation of System-in-Package
ACM Transactions on Design Automation of Electronic Systems, 2025, 2.025
URL, DOI, RIS, BibTex
I. Cejic,
A. Neskovic,
M. Berekovic,
S. Mulhem, and
V. Vranjkovic
Area-Optimized RISC-V Matrix Extension Implementation for Edge Devices
33rd Telecommunications Forum (TELFOR), IEEE, 2025, 2.025
URL, RIS, BibTex
Area-Optimized RISC-V Matrix Extension Implementation for Edge Devices
33rd Telecommunications Forum (TELFOR), IEEE, 2025, 2.025
URL, RIS, BibTex
W. Foudhaili,
A. Nechi,
C. Thermann,
M. A. Johmani,
R. uchty,
M. Berekovic, and
S. Mulhem
Reconfigurable Edge Hardware for Intelligent IDS: Systematic Approach
Applied Reconfigurable Computing. Architectures, Tools, and Applications, Springer, 2.024
RIS, BibTex
Reconfigurable Edge Hardware for Intelligent IDS: Systematic Approach
Applied Reconfigurable Computing. Architectures, Tools, and Applications, Springer, 2.024
RIS, BibTex
D. Hirsch,
F. Hoffmann,
A. Neskovic,
C. Thermann,
R. Buchty,
M. Berekovic, and
S. Mulhem
Efficient AI-based Attack Detection Methods for Sensitive Edge Devices and Systems
Advancing Edge Artificial Intelligence, River Publishers, 2.024
RIS, BibTex
Efficient AI-based Attack Detection Methods for Sensitive Edge Devices and Systems
Advancing Edge Artificial Intelligence, River Publishers, 2.024
RIS, BibTex
E. Rama,
M. Ayache,
R. Buchty,
B. Bauer,
M. Korb,
M. Berekovic, and
S. Mulhem
Trustworthy Integrated Circuits: From Safety to Security and Beyond
IEEE Access, IEEE, 2024, 2.024
URL, RIS, BibTex
Trustworthy Integrated Circuits: From Safety to Security and Beyond
IEEE Access, IEEE, 2024, 2.024
URL, RIS, BibTex
A. Moualhi,
M. Nezami,
S. Mulhem, and
G. Schildbach
Experimental Evaluation of Deep Neural Networks for Vehicle Model Identification
2024 European Control Conference (ECC), IEEE, Stockholm, Sweden 2024, 2.024
URL, RIS, BibTex
Experimental Evaluation of Deep Neural Networks for Vehicle Model Identification
2024 European Control Conference (ECC), IEEE, Stockholm, Sweden 2024, 2.024
URL, RIS, BibTex
S. Mulhem,
F. Muuss,
C. Ewert,
R. Buchty,
M., and
Berekovic
ML-Based Trojan Classification: Repercussions of Toxic Boundary Nets
in IEEE Embedded Systems Letters, IEEE, 2024, 2.024
URL, RIS, BibTex
ML-Based Trojan Classification: Repercussions of Toxic Boundary Nets
in IEEE Embedded Systems Letters, IEEE, 2024, 2.024
URL, RIS, BibTex
S. Mulhem,
C. Ewert,
A. Neskovic,
A. Poudel,
C. Hübner,
M. Berekovic, and
R. Buchty
Secure Software/Hardware Hybrid In-Field Testing for System-on-Chip
2024 IFIP/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC), IEEE, Tanger, Morocco 2024, 2.024
URL, RIS, BibTex
Secure Software/Hardware Hybrid In-Field Testing for System-on-Chip
2024 IFIP/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC), IEEE, Tanger, Morocco 2024, 2.024
URL, RIS, BibTex
J. Bouhlila,
F. Last,
R. Buchty,
M. Berekovic, and
S. Mulhem
Machine Learning for SRAM Stability Analysis
2024 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, IEEE, Singapore 2024, 2.024
URL, RIS, BibTex
Machine Learning for SRAM Stability Analysis
2024 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, IEEE, Singapore 2024, 2.024
URL, RIS, BibTex
M. Ayache,
E. Rama,
S. Mulhem,
M. Berekovic, and
M. Korb
Holistic Framework for Evaluating the Trustworthiness of Integrated Circuits
2024 IFIP/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC), IEEE, Tanger, Morocco 2024, 2.024
URL, RIS, BibTex
Holistic Framework for Evaluating the Trustworthiness of Integrated Circuits
2024 IFIP/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC), IEEE, Tanger, Morocco 2024, 2.024
URL, RIS, BibTex
A. Nechi,
A. Mahmoudi,
C. Herold,
D. Widmer,
T. Kürner,
M. Berekovic, and
S. Mulhem
Practical Trustworthiness Model for DNN in Dedicated 6G Application
2023 19th International Conference on Wireless and Mobile Computing, Networking and Communications (WiMob), 312-317, 2.023
wireless communication sensitivity 6g communication terahertz band modulation recognition trustworthiness
URL, DOI, RIS, BibTex
Practical Trustworthiness Model for DNN in Dedicated 6G Application
2023 19th International Conference on Wireless and Mobile Computing, Networking and Communications (WiMob), 312-317, 2.023
wireless communication sensitivity 6g communication terahertz band modulation recognition trustworthiness
URL, DOI, RIS, BibTex
A. Nechi,
L. Groth,
S. Mulhem,
F. Merchant,
R. Buchty, and
M. Berekovic
FPGA-based Deep Learning Inference Accelerators: Where Are We Standing?
ACM Transactions on Reconfigurable Technology and Systems, 16(4), 1-32, 2.023
RIS, BibTex
FPGA-based Deep Learning Inference Accelerators: Where Are We Standing?
ACM Transactions on Reconfigurable Technology and Systems, 16(4), 1-32, 2.023
RIS, BibTex
A. Neskovic,
S. Mulhem,
A. Treff,
R. Buchty,
T. Eisenbarth, and
M. Berekovic
SystemC Model of Power Side-Channel Attacks Against AI Accelerators: Superstition or not?
in ICCAD '23: Proceedings of the 42nd IEEE/ACM International Conference on Computer-Aided Design, IEEE/ACM, 2023, 2.023
URL, RIS, BibTex
SystemC Model of Power Side-Channel Attacks Against AI Accelerators: Superstition or not?
in ICCAD '23: Proceedings of the 42nd IEEE/ACM International Conference on Computer-Aided Design, IEEE/ACM, 2023, 2.023
URL, RIS, BibTex
P. Grothe,
S. Mulhem, and
M. Berekovic
An Almost Fully RRAM-Based LUT Design for Reconfigurable Circuits
In: Palumbo, F., Keramidas, G., Voros, N., Diniz, P.C. (eds) Applied Reconfigurable Computing. Architectures, Tools, and Applications. ARC 2023. Lecture Notes in Computer Science, vol 14251, Springer, Cham 2023, 2.023
URL, DOI, RIS, BibTex
An Almost Fully RRAM-Based LUT Design for Reconfigurable Circuits
In: Palumbo, F., Keramidas, G., Voros, N., Diniz, P.C. (eds) Applied Reconfigurable Computing. Architectures, Tools, and Applications. ARC 2023. Lecture Notes in Computer Science, vol 14251, Springer, Cham 2023, 2.023
URL, DOI, RIS, BibTex
B. Bauer,
M. Ayache,
S. Mulhem,
M. Nitzan,
J. Athavale,
R. Buchty, and
M. Berekovic
On the Dependability Lifecycle of Electrical/Electronic Product Development: The Dual-Cone V-Model
in Computer, vol. 55, no. 9, 99-106, 2022, 2.022
URL, DOI, RIS, BibTex
On the Dependability Lifecycle of Electrical/Electronic Product Development: The Dual-Cone V-Model
in Computer, vol. 55, no. 9, 99-106, 2022, 2.022
URL, DOI, RIS, BibTex
R. Zarrouk,
S. Mulhem,
W. Adi, and
M. Berekovic
Clone-Resistant Secured Booting Based on Unknown Hashing Created in Self-Reconfigurable Platform
In: Derrien S., Hannig F., Diniz P.C., Chillet D. (eds) Applied Reconfigurable Computing. Architectures, Tools, and Applications. ARC 2021. Lecture Notes in Computer Science, vol 12700, Springer, Cham 2021, 2.021
URL, DOI, RIS, BibTex
Clone-Resistant Secured Booting Based on Unknown Hashing Created in Self-Reconfigurable Platform
In: Derrien S., Hannig F., Diniz P.C., Chillet D. (eds) Applied Reconfigurable Computing. Architectures, Tools, and Applications. ARC 2021. Lecture Notes in Computer Science, vol 12700, Springer, Cham 2021, 2.021
URL, DOI, RIS, BibTex
E. Hamadaqa,
S. Mulhem,
W. Adi, and
M. Berekovic
Contemporary Physical Clone-Resistant Identity for IoTs and Emerging Technologies
Cryptography 2021, 2021, 2.021
URL, DOI, RIS, BibTex
Contemporary Physical Clone-Resistant Identity for IoTs and Emerging Technologies
Cryptography 2021, 2021, 2.021
URL, DOI, RIS, BibTex
M. Tayachi,
S. Mulhem,
W. Adi,
L. Nana,
A. Pascu, and
F. Benzarti
Tamper and Clone-Resistant Authentication Scheme for Medical Image Systems
Cryptography 2020, 4(3), 19, 2020, 2.020
URL, RIS, BibTex
Tamper and Clone-Resistant Authentication Scheme for Medical Image Systems
Cryptography 2020, 4(3), 19, 2020, 2.020
URL, RIS, BibTex