J. Joseph, C. Blochwitz, A. García-Ortiz, and T. Pionteck
Area and power savings via buffer reorganization in asymmetric 3D-NoCs for heterogeneous 3D-SoCs
MICPRO 2460, 36–47, Elsevier, Amsterdam 2017, 2.017
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J. M. Joseph, S. Wrieden, C. Blochwitz, A. García-Ortiz, and T. Pionteck
A Simulation Environment for Design Space Exploration for Asymmetric 3D-Network-on-Chip
11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2016), Tallinn 2016, 2.016
URL, DOI, RIS, BibTex